For many years, the computer industry has relied on steady progress in the exponential rate of scaling MOSFETs in integrated circuits. The usual expectation, based on Moore's law, is that the number of transistors able to be packed on a chip doubles roughly every 18 months. Sustaining this pace requires aggressive research into the numerous bottlenecks that threaten to slow it down. Much research has gone into the photolithography needed to produce such dense circuits, device structures that would allow smaller channel lengths, and a plethora of other materials and device advances that help sustain the present rate of scaling. In the past decade, however, another issue has emerged that threatens to impose an absolute limit on how many transistors can be packed onto a die. This is the issue of heat dissipation.

Two-dimensional (2D) materials have emerged as the ideal candidates for many applications, including nanoelectronics, low-power devices, and sensors. Several 2D materials have been shown to possess large Seebeck coefficients, thus making them suitable for thermoelectric (TE) energy conversion. Whether even higher TE power factors can be discovered among the ≈2000 possible 2D materials (Mounet et al 2018 Nat. Nanotechnol. 13 246–52) is an open question. This study aims at formulating selection rules to guide the search for superior 2D TE materials without the need for expensive atomistic simulations. We show that a 2D material having a combination of low effective mass, higher separation in the height of the step-like density of states, and valley splitting, which is the energy difference between the bottom of conduction band and the satellite valley, equal to 5 kBT will lead to a higher TE power factor. Further, we find that inelastic scattering with optical phonons plays a significant role: if inelastic scattering is the dominant mechanism and the energy of the optical phonon equals 5 kBT, then the TE power factor is maximized. Starting from a model for carrier transport in MoS2 and progressively introducing the aforementioned features results in a two-orders-of-magnitude improvement in the power factor. Compared to the existing selection rules or material descriptors, features identified in this study provide the ability to comprehensively evaluate TE capability of a material and helps in identifying future TE materials suitable for applications in waste-heat scavenging, thermal sensors, and nanoelectronics cooling.

Heat dissipation in next-generation electronics based on two-dimensional (2D) materials is a critical issue in their development and implementation. A potential bottleneck for heat removal in 2D-based devices is the thermal pathway from the 2D layer into its supporting substrate. The choice of substrate, its composition and structure, can strongly impact the thermal boundary conductance (TBC). Here we investigate the temperature-dependent TBC of 42 interfaces formed between a group of six 2D materials and seven crystalline and amorphous substrates. We use first-principles density functional perturbation theory to calculate the full phonon dispersion of the 2D layers and substrates and then input them into our model for phonon transport across the 2D–3D interface. Our results show that the TBC depends on the overlap between the vibrational frequencies and can be varied by nearly two orders of magnitude, from as low as  ∼0.6 MW · m K−1 (h-BN on diamond) to  ∼40 MW · m K−1 (h-BN on SiO2), for the same 2D layer by changing the substrate material. We find that amorphous materials significantly boost the TBC relative to their crystalline counterparts, assuming the two interfaces have the same adhesion, owing to the low-frequency Boson peak feature in their vibrational density of states (vDOS). For crystalline substrates, we further correlate constituent material properties with the calculated TBCs and find that the TBC strongly depends on a combination of the speed of sound, Debye temperature, and density of the substrate as well as the bandwidth of the flexural branch in the 2D material. We conclude that softer substrates with sharp low-frequency features in their vDOS, such as amorphous materials, polymers, and nanoparticles, could have higher TBC, leading to a trade-off between TBC and the thermal conductivity of the substrate.

This article discusses the application of thermoelectric (TE) materials in building facade systems, which can be used to create active exterior enclosures. TEs are semiconductors that have the ability to produce a temperature gradient when electricity is applied, exploiting the Peltier effect, or to generate a voltage when exposed to a temperature gradient, utilizing the Seebeck effect. TEs can be used for heating, cooling, or electricity generation. In this research, heating and cooling applications of these novel systems were explored. We designed and constructed two prototypes, where one prototype was used to study integration of TE modules (TEMs) as stand-alone elements in the facade, and one prototype was used to explore integration of TEMs and heat sinks in facade assemblies. Both prototypes were tested for heating and cooling potential, using a thermal chamber to represent four different exterior environmental conditions (-18°C, -1°C, 16°C and 32°C). The interior ambient conditions were kept constant at room temperature. The supplied voltage to facade-integrated TEMs varied from 1 to 8 V. We measured temperature outputs of TEMs for all investigated thermal conditions using thermal imaging, which are discussed in this article. The results indicate that while stand-alone facade-integrated TEMs are not stable, addition of heat sinks improves their performance drastically. Facade-integrated TEMs with heatsinks showed that they would operate well in heating and cooling modes under varying exterior environmental conditions.

The impact of interfaces and heterojuctions on the electronic and thermoelectric transport properties of materials is discussed herein. Recent progress in understanding electronic transport in heterostructures of 2D materials ranging from graphene to transition metal dichalcogenides, their homojunctions (grain boundaries), lateral heterojunctions (such as graphene/MoS2 lateral interfaces), and vertical van der Waals heterostructures is reviewed. Work on thermopower in 2D heterojunctions, as well as their applications in creating devices such as resonant tunneling diodes (RTDs), is also discussed. Last, the focus turns to work in 3D heterostructures. While transport in 3D heterostructures has been researched for several decades, here recent progress in theory and simulation of quantum effects on transport via the Wigner and non‐equilibrium Green's functions approaches is reviewed. These simulation techniques have been successfully applied toward understanding the impact of heterojunctions on transport properties and thermopower, which finds applications in energy harvesting, and electron resonant tunneling, with applications in RTDs. In conclusion, tremendous progress has been made in both simulation and experiments toward the goal of understanding transport in heterostructures and this progress will soon be parlayed into improved energy converters and quantum nanoelectronic devices.

Van der Waals interactions in 2D materials have enabled the realization of nanoelectronics with high‐density vertical integration. Yet, poor energy transport through such 2D–2D and 2D–3D interfaces can limit a device's performance due to overheating. One long‐standing question in the field is how different encapsulating layers (e.g., contact metals or gate oxides) contribute to the thermal transport at the interface of 2D materials with their 3D substrates. Here, a novel self‐heating/self‐sensing electrical thermometry platform is developed based on atomically thin, metallic Ti3C2 MXene sheets, which enables experimental investigation of the thermal transport at a Ti3C2/SiO2 interface, with and without an aluminum oxide (AlOx) encapsulating layer. It is found that at room temperature, the thermal boundary conductance (TBC) increases from 10.8 to 19.5 MW m−2 K−1 upon AlOx encapsulation. Boltzmann transport modeling reveals that the TBC can be understood as a series combination of an external resistance between the MXene and the substrate, due to the coupling of low‐frequency flexural acoustic (ZA) phonons to substrate modes, and an internal resistance between ZA and in‐plane phonon modes. It is revealed that internal resistance is a bottle‐neck to heat removal and that encapsulation speeds up the heat transfer into low‐frequency ZA modes and reduces their depopulation, thus increasing the effective TBC.

The steady-state behavior of thermal transport in bulk and nanostructured semiconductors has been widely studied, both theoretically and experimentally. On the other hand, fast transients and frequency dynamics of thermal conduction has been given less attention. The frequency response of thermal conductivity has become more crucial in recent years, especially in light of the constant rise in the clock frequencies in microprocessors and terahertz sensing applications. Thermal conductivity in response to a time-varying temperature field starts decaying when the frequency exceeds a cut-off frequency Ωc, which is related to the inverse of phonon relaxation time τ , on the order of 2-10 ps in most bulk semiconductors. Phonons in graphene have much longer phonon relaxation times, which we show leads to far lower Ωc. Our calculations, based on the phonon Boltzmann equation coupled with first-principles dispersion, show that dynamical thermal conductivity of graphene resembles a low-pass filter that decays beyond an Ωc ranging from 100 MHz to 10 GHz, controlled by temperature and ribbon width. The response parallels the Drude model of electrons, but with far lower cut-off. Moreover, the presence of strong normal processes in graphene results in a complex-valued conductivity and gradual transition around Ωc, with the resistive contribution to the heat flux having higher cutoff frequency and smaller phase lag than the hydrodynamic part. The dynamical conductivity will impact dissipation in high-frequency applications of graphene. Our findings also provide a platform for future studies of hydrodynamic transport and wave-like, or second sound, heat transfer by tuning the frequency of the applied temperature field.

Thermoelectric (TE) devices enable robust solid-state conversion of waste heat to electricity but their applications are still limited by relatively modest efficiency. Power factor controls the TE energy conversion efficiency of a material. A higher power factor also helps to increase the passive or electronic cooling ability. Single-layer (SL) 2-dimensional (2D) materials have been analytically shown to have higher power factors [1]. In this work, we extend our 3D model to simulate quantum transport and capture energy filtering in 2D SL $\text{MoS}_{2}$ that can improve power factor. Energy relaxation and quantum effects from periodic spatially varying potential barriers are modeled in the Wigner-Rode formalism. Our simulations show an increase in power factor in both cosine- and square-shaped barriers with the height of the potential barrier, resulting in over 30% power factor enhancement. This improvement in TE efficiency helps in the development of efficient waste-heat scavenging, body-heat-powered wearables, thermal sensors, and electronic cooling.

The ongoing shrinkage in the size of two-dimensional (2D) electronic circuitry results in high power densities during device operation, which could cause a significant temperature rise within 2D channels. One challenge in Raman thermometry of 2D materials is that the commonly used high-frequency modes do not precisely represent the temperature rise in some 2D materials because of peak broadening and intensity weakening at elevated temperatures. In this work, we show that a low-frequency E2g2 shear mode can be used to accurately extract temperature and measure thermal boundary conductance (TBC) in back-gated tungsten diselenide (WSe2) field-effect transistors, whereas the high-frequency peaks (E2g1 and A1g) fail to provide reliable thermal information. Our calculations indicate that the broadening of high-frequency Raman-active modes is primarily driven by anharmonic decay into pairs of longitudinal acoustic phonons, resulting in a weak coupling with out-of-plane flexural acoustic phonons that are responsible for the heat transfer to the substrate. We found that the TBC at the interface of WSe2 and Si/SiO2 substrate is ∼16 MW/m2 K, depends on the number of WSe2 layers, and peaks for 3-4 layer stacks. Furthermore, the TBC to the substrate is the highest from the layers closest to it, with each additional layer adding thermal resistance. We conclude that the location where heat dissipated in a multilayer stack is as important to device reliability as the total TBC.

Two-dimensional (2D) materials have tremendous potential for next-generation nano- and opto-electronics [1], [2]. However, heat dissipation and its removal from hot spots in the monolayer remains a critical concern to the design of 2D-based devices [2], [3]. Thermal currents flowing in a atomic layer can either dissipate through source/drain contacts, as in a transistor configuration, or through a supporting substrate via van der Waals (vdW) coupling to it. When a 2D mateiral is supported by a substrate, the interfacial area formed between it and the substrate is often far larger than the lateral source/drain contact area. Thus, it is suspected that the majority of waste heat is removed across the 2D-substrate interface and then via the substrate. Therefore, it is imperative that the thermal boundary conductance (TBC) between the 2D layer and substrate be well characterized for reliable 2D device performance. Herein we tackle the question of selecting the best substrate for each 2D material from the point of view of heat dissipation.