Robust and secure microgrid (MG) design requires test configurations that accurately reflect real-world systems and comply with established standards. This paper reviews guidelines for military MG design, focusing on standards issued by United States defense and security organizations. It also evaluates widely recognized IEEE and CIGRE test MG configurations for their ability to replicate military power network characteristics. To assess analytical accuracy, power flow studies are performed on a selected test MG using DIgSILENT PowerFactory, ETAP, and OpenDSS. A comparative analysis of results highlights differences in modelling approaches and computational precision among these tools. The findings provide insights into the suitability of existing test configurations and simulation platforms for military MG research, supporting the development of secure, standardcompliant solutions.

This paper presents a robust discrete-time sliding mode controller (DT–SMC) for a bidirectional DC/DC converter that is used as an energy storage interface in DC microgrids. The proposed controller is implemented in a hierarchical cascaded control structure comprising an inner current loop and an outer voltage loop, together with a current-reference limiter and duty-cycle saturation. Both loops adopt DT–SMC to achieve fast sampled-data tracking under nominal non-saturated operation. A multirate framework is implemented to balance dynamic performance, control accuracy, and computational complexity. To improve disturbance rejection, disturbance estimators (DEs) based on the sliding variable are incorporated in both loops and equipped with an anti-windup compensation to suppress error accumulation. The controller requires only the converter current and terminal voltages, facilitating practical digital implementation with fixed-frequency pulse-width modulation (PWM). Simulation results compare the proposed method with benchmark cascaded DT–PI and STA–SMC controllers, while experimental tests on a laboratory prototype confirm its practical feasibility. The presented results indicate chattering mitigation through reduced duty-cycle variation, accurate reference tracking, fast transient response, and disturbance rejection under the tested operating conditions.

Under fluctuating demand and distributed generation, smart-grid (SG) modernization depends on the reliability and efficiency of power electronic converters (PECs). However, PECs face operational stresses and gradual degradation, which compromise their performance. To address these challenges, digital twin (DT) technology is introduced as a virtual counterpart that interacts with the physical PEC, enabling real-time monitoring, predictive maintenance, and performance optimization. Numerous DT implementations for PECs have been reported, yet most focus on modeling/control, leaving communication requirements and technology selection underexplored. To address this gap, in this paper we first review existing DT realizations to identify their key communication requirements. Based on that research, we proposed a classification framework that links DT functionality to appropriate communication solutions and provided practical guidance for selecting the optimal technologies. These guidelines specify which communication technologies are most suitable for each DT category, which makes informed decision-making easier when DT-enabled PECs are used in modern smart grids.

This paper presents the control of DC-DC buck converter. The control strategy is based on the theory of discrete-time sliding mode control to ensure robustness against parameter variations and external disturbances. The output voltage regulation is achieved using a digital controller that combines discrete-time first-order sliding mode control with a discrete-time realization of the super-twisting algorithm, commonly used in second-order sliding mode control. The design of the proposed controller is performed using a discrete-time model of the DC-DC buck converter. Extensive simulations were conducted in Matlab/Simulink to validate the performance of the control algorithm under varying load conditions and input voltage fluctuations. A comparative study between conventional PI controller and the proposed discrete-sliding mode based controller in tracking of various voltage references under action of disturbances is given.

This paper presents a comparative evaluation of two Four Diode Model (FDM) variants for photovoltaic (PV) I–V (current-voltage) curve generation with the goal of efficient Maximum Power Point (MPP) extraction in inverter control systems. The models considered include the exact FDM and an approximate solution based on the Lambert W function. The study focuses on assessing the trade-offs between computational time and accuracy during real-time curve generation. Equilibrium optimizer (EO) algorithm, along with its hybrid variants, is applied to each model to generate the I–V curve, from which the MPP is identified directly. Performance metrics include execution time and curve fidelity, providing insights into the suitability of each model for secure and efficient MPPT implementation in mobile microgrid inverters.

Reliable and computationally efficient modeling of photovoltaic (PV) cells is essential for real-time control of power electronic systems, especially in safety-critical applications such as inverter control in smart grids and defense-related infrastructures. This paper investigates the accuracy, speed, and robustness of several PV cell models — including the Single Diode Model (SDM), Double Diode Model (DDM), and Triple Diode Model (TDM) — using closed-form and semi-analytical parameter estimation techniques based on the Lambert W function. The performance of each model is evaluated with respect to estimation time, curve-fitting accuracy, and its impact on Maximum Power Point Tracking (MPPT) behavior. The results demonstrate that, while more complex models offer higher fidelity, the computational burden may compromise real-time applicability.

This paper presents the development and validation of a computation model of a cascaded multilevel power inverter as an initial step toward creating a high-fidelity digital twin. A preliminary overview of the cascaded multilevel inverter topology is provided, followed by introducing a mathematical modeling approach that uses graph theory to derive the system's nodal equations. The computation model is implemented in a programmable environment, and its output is compared to the MATALB/Simulink-based simulation, which serves as a reference for performance evaluation. The evaluation is performed using the mean square error (MSE) metric to quantify the accuracy of the proposed model. Results indicate a close agreement between the computation model and simulation data, confirming the model's potential for integration into future real-time digital twin architectures for power converter control and diagnostics.

This paper presents a robust voltage control of a buck converter with inductor current limitation applying discrete-time sliding mode control. The proposed voltage controller is designed in a hierarchical cascade structure comprising an inner current loop with current limiting and an outer voltage loop. Both loops employ sliding mode control in discrete time because of the achievement of finite-time dynamic performance. To ensure robustness against matched external and parametric disturbances, a disturbance estimation is introduced based on the integral of the sliding variable combined by an anti-windup mechanism to suppress overshoots. Including the current limiter ensures that the inductor current remains within safe operational boundaries, even during transient conditions, preventing hardware stress and enhancing reliability. The controller is implemented using pulse-width modulation (PWM) ensuring a fixed switching frequency and ease of practical implementation. The simulation results validate the proposed approach, demonstrating high performance, strong disturbance rejection, and negligible overshoot, while maintaining a straightforward and efficient control design.

This paper presents a discrete-time sliding mode voltage controller for a DC-DC boost converter. A disturbance estimator is integrated into the controller, ensuring a fast dynamic response and robustness against matched disturbances and parametric uncertainties, such as input voltage fluctuations, load variations and internal nonlinear dynamics that affect system performance. The disturbance estimator improves the rejection of unmeasured perturbations using only local measurements, without requiring additional sensors or complex adaptive structures. A cascade control scheme is adopted, with an inner inductor current loop and an outer voltage regulation loop. Both controllers utilize disturbance-compensated discrete-time sliding mode control strategies. The simulation results validate the effectiveness of the method, comparing it to the optimized discrete-time proportional integral (DT PI) cascade controller, demonstrating precise voltage regulation and tight performance under disturbances.