Artificial neural networks (ANNs) are notoriously power- and time-consuming when implemented on conventional von Neumann computing systems. Recent years have seen an emergence of research in hardware that strives to break the bottleneck of von Neumann architecture and optimise the data flow; namely to bring memory and computing closer together. One of the most often suggested solutions is the physical implementation of ANNs in which their synaptic weights are realised with analogue resistive devices, such as resistive random-access memory (RRAM). However, various device- and system-level non-idealities usually prevent these physical implementations from achieving high inference accuracy. We suggest applying a well-known concept in computer science -- committee machine (CM) -- in the context of RRAM-based neural networks. Using simulations and experimental data from three different types of RRAM devices, we show that CMs employing ensemble averaging can successfully increase inference accuracy in physically implemented neural networks that suffer from faulty devices, programming non-linearities, random telegraph noise, cycle-to-cycle variability and line resistance. Importantly, we show that the accuracy can be improved even without increasing the number of devices.
The atomic force microscope empowers research into nanoscale structural and functional material properties. Recently, the scope of application has broadened with the arrival of conductance tomography, a technique for mapping current in three-dimensions in electronic devices by gradually removing sample material with the scanning probe. This technique has been valuable in studying resistance switching memories and solar cells, although its broader use has been hindered by a lack of understanding of its reliability and practicality. Implementation can be preclusive, owing to difficulties in characterizing tip-sample interactions and accounting for probe degradation, both of which are crucial factors in process efficacy. This work follows the existing conductance tomography literature, presenting an insight into the repeatability and reliability of the material removal processes. The consistency of processes on a hard oxide and a softer metal are investigated, to understand the critical differences in etching behavior that might affect tomography measurements on heterostructures. Individual probe behavior stabilizes following a wearing-in stage and etching processes are consistent between probes, in particular on oxide. However, process inconsistency increases with applied force on metal. The effects of scan angle, tip speed and feedback gain are therefore explored and their tuning found to improve the spatial consistency of material removal. With these findings, we aim to present a critical study of the implementation of tomography with the atomic force microscope in order to contribute to its methodological development.
Resistive Random Access Memory (RRAM) is a promising technology for power efficient hardware in applications of artificial intelligence (AI) and machine learning (ML) implemented in non-von Neumann architectures. However, there is an unanswered question if the device non-idealities preclude the use of RRAM devices in this potentially disruptive technology. Here we investigate the question for the case of inference. Using experimental results from silicon oxide (SiOx) RRAM devices, that we use as proxies for physical weights, we demonstrate that acceptable accuracies in classification of handwritten digits (MNIST data set) can be achieved using non-ideal devices. We find that, for this test, the ratio of the high- and low-resistance device states is a crucial determinant of classification accuracy, with ~96.8% accuracy achievable for ratios >3, compared to ~97.3% accuracy achieved with ideal weights. Further, we investigate the effects of a finite number of discrete resistance states, sub-100% device yield, devices stuck at one of the resistance states, current/voltage non-linearities, programming non-linearities and device-to-device variability. Detailed analysis of the effects of the non-idealities will better inform the need for the optimization of particular device properties.
We report a study of the relationship between oxide microstructure at the scale of tens of nanometres and resistance switching behaviour in silicon oxide. In the case of sputtered amorphous oxides, the presence of columnar structure enables efficient resistance switching by providing an initial structured distribution of defects that can act as precursors for the formation of chains of conductive oxygen vacancies under the application of appropriate electrical bias. Increasing electrode interface roughness decreases electroforming voltages and reduces the distribution of switching voltages. Any contribution to these effects from field enhancement at rough interfaces is secondary to changes in oxide microstructure templated by interface structure.
Cycle-to-cycle (C2C) current variability occurring in ReRAM devices is not only a stochastic feature inherent to electron transport in low-dimensional conducting structures but also a consequence of the measurement protocol used to characterize the device evolution during resistance switching. In such latest case, C2C changes depend on the particular arrangement of the ions or vacancies that form the conducting filament spanning the dielectric film. In this letter, a discrete first-order autoregressive model AR(1) with long-term variation is used to represent both the random and the “deterministic” behaviors of the high resistance state current. Simulation of C2C instabilities in SiOx is carried out through the quantum point-contact model for filamentary electron transport in dielectrics with fluctuating confinement potential barrier height. Simplicity is of utmost importance, since the proposed approach is aimed for circuit simulation environments in which complex and time-consuming computations need to be avoided.
Conductive atomic force microscopy (CAFM) has been widely used for electrical characterization of thin dielectrics by applying a gentle contact force that ensures a good electrical contact without inducing additional high‐pressure related phenomena (e.g., flexoelectricity, local heat, scratching). Recently, the CAFM has been used to obtain 3D electrical images of thin dielectrics by etching their surface. However, the effect of the high contact forces/pressures applied during the etching on the electrical properties of the materials has never been considered. By collecting cross‐sectional transmission electron microscopy images at the etched regions, it is shown here that the etching process can modify the morphology of Al2O3 thin films (producing phase change, generation of defects, and metal penetration). It is also observed that this technique severely modifies the electrical properties of pSi and TiO2 wafers during the etching, and several behaviors ignored in previous studies, including i) observation of high currents in the absence of bias, ii) instabilities of etching rate, and iii) degradation of CAFM tips, are reported. Overall, this work should contribute to understand better the limitations of this technique and disseminate it among those applications in which it can be really useful.
Interest in resistance switching is currently growing apace. The promise of novel high‐density, low‐power, high‐speed nonvolatile memory devices is appealing enough, but beyond that there are exciting future possibilities for applications in hardware acceleration for machine learning and artificial intelligence, and for neuromorphic computing. A very wide range of material systems exhibit resistance switching, a number of which—primarily transition metal oxides—are currently being investigated as complementary metal–oxide–semiconductor (CMOS)‐compatible technologies. Here, the case is made for silicon oxide, perhaps the most CMOS‐compatible dielectric, yet one that has had comparatively little attention as a resistance‐switching material. Herein, a taxonomy of switching mechanisms in silicon oxide is presented, and the current state of the art in modeling, understanding fundamental switching mechanisms, and exciting device applications is summarized. In conclusion, silicon oxide is an excellent choice for resistance‐switching technologies, offering a number of compelling advantages over competing material systems.
Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, with electronic nonvolatile memories being those that have received the most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology.
Resistance switching, or Resistive RAM (RRAM) devices show considerable potential for application in hardware spiking neural networks (neuro-inspired computing) by mimicking some of the behavior of biological synapses, and hence enabling non-von Neumann computer architectures. Spike-timing dependent plasticity (STDP) is one such behavior, and one example of several classes of plasticity that are being examined with the aim of finding suitable algorithms for application in many computing tasks such as coincidence detection, classification and image recognition. In previous work we have demonstrated that the neuromorphic capabilities of silicon-rich silicon oxide (SiOx) resistance switching devices extend beyond plasticity to include thresholding, spiking, and integration. We previously demonstrated such behaviors in devices operated in the unipolar mode, opening up the question of whether we could add plasticity to the list of features exhibited by our devices. Here we demonstrate clear STDP in unipolar devices. Significantly, we show that the response of our devices is broadly similar to that of biological synapses. This work further reinforces the potential of simple two-terminal RRAM devices to mimic neuronal functionality in hardware spiking neural networks.
We employ an advanced three-dimensional (3D) electro-thermal simulator to explore the physics and potential of oxide-based resistive random-access memory (RRAM) cells. The physical simulation model has been developed recently, and couples a kinetic Monte Carlo study of electron and ionic transport to the self-heating phenomenon while accounting carefully for the physics of vacancy generation and recombination, and trapping mechanisms. The simulation framework successfully captures resistance switching, including the electroforming, set and reset processes, by modeling the dynamics of conductive filaments in the 3D space. This work focuses on the promising yet less studied RRAM structures based on silicon-rich silica (SiOx) RRAMs. We explain the intrinsic nature of resistance switching of the SiOx layer, analyze the effect of self-heating on device performance, highlight the role of the initial vacancy distributions acting as precursors for switching, and also stress the importance of using 3D physics-based models to capture accurately the switching processes. The simulation work is backed by experimental studies. The simulator is useful for improving our understanding of the little-known physics of SiOx resistive memory devices, as well as other oxide-based RRAM systems (e.g. transition metal oxide RRAMs), offering design and optimization capabilities with regard to the reliability and variability of memory cells.
In this paper, we present high-performance resistance switching memory devices (RRAM) with a SiO2 -like active layer formed from spin-on hydrogen silsesquioxane (HSQ). Our metal–insulator–metal devices exhibit switching voltages of less than 1 V, cycling endurance of more than 107 cycles without failure, electroforming below 2 V at room temperature, and retention time of resistance states of more than 104 seconds at temperatures up to 120 °C. We also report arrays of nanoscale HSQ-based RRAM devices in the form of multilayer nanopillars with switching performance comparable to that of our thin film devices. We are able to address and program individual RRAM nanopillars using conductive atomic force microscopy. These promising results, coupled with a much easier fabrication method than traditional ultrahigh vacuum-based deposition techniques, make HSQ a strong candidate material for the next-generation memory devices.
We report a study of light-activated resistance switching in silicon oxide (SiOx) resistive random access memory (RRAM) devices. Our devices had an indium tin oxide/SiOx/p-Si Metal/Oxide/Semiconductor structure, with resistance switching taking place in a 35 nm thick SiOx layer. The optical activity of the devices was investigated by characterising them in a range of voltage and light conditions. Devices respond to illumination at wavelengths in the range of 410–650 nm but are unresponsive at 1152 nm, suggesting that photons are absorbed by the bottom p-type silicon electrode and that generation of free carriers underpins optical activity. Applied light causes charging of devices in the high resistance state (HRS), photocurrent in the low resistance state (LRS), and lowering of the set voltage (required to go from the HRS to LRS) and can be used in conjunction with a voltage bias to trigger switching from the HRS to the LRS. We demonstrate negative correlation between set voltage and applied laser power using a 632.8 nm laser source. We propose that, under illumination, increased electron injection and hence a higher rate of creation of Frenkel pairs in the oxide—precursors for the formation of conductive oxygen vacancy filaments—reduce switching voltages. Our results open up the possibility of light-triggered RRAM devices.We report a study of light-activated resistance switching in silicon oxide (SiOx) resistive random access memory (RRAM) devices. Our devices had an indium tin oxide/SiOx/p-Si Metal/Oxide/Semiconductor structure, with resistance switching taking place in a 35 nm thick SiOx layer. The optical activity of the devices was investigated by characterising them in a range of voltage and light conditions. Devices respond to illumination at wavelengths in the range of 410–650 nm but are unresponsive at 1152 nm, suggesting that photons are absorbed by the bottom p-type silicon electrode and that generation of free carriers underpins optical activity. Applied light causes charging of devices in the high resistance state (HRS), photocurrent in the low resistance state (LRS), and lowering of the set voltage (required to go from the HRS to LRS) and can be used in conjunction with a voltage bias to trigger switching from the HRS to the LRS. We demonstrate negative correlation between set voltage and applied laser power u...
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