An implementation of a deeply programmable SDN switch based on a hybrid FPGA/CPU architecture
Software-Defined Networks (SDN) simplify tasks performed by the network switches and centralize the network management by clearly separating networking processes into an application, control, and data plane. An OpenFlow, the flagship of SDN implementation, has reduced the innovation of such networks by diminishing switching tasks to the simple lookup of packet flow tables. A novel hybrid architecture of a deeply programmable packet-switching node (DPPSN), based on field-programmable gate array (FPGA) and central processing unit (CPU) technologies, is proposed, with the aim of overcoming OpenFlow’s limitations regarding the ability to implement new protocols and advanced packet processing functionalities. It has been demonstrated, through the implementation and experimental evaluation of the DPPSN, that it is justified to use hybrid FPGA/CPU architecture for this purpose.